High-Frequency Characterization and Modeling of Low and High Voltage FinFETs for RF SoCs
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High-Frequency Characterization and Modeling of Low and High Voltage FinFETs for RF SoCs
Wed, 31/05/2023 - 14:00 to 15:00
Location:
Speaker:
Prof. Yogesh Singh Chauhan
Affiliation:
Indian Institute of Technology Kanpur (IITK)
Synopsis:
Modern System-On-Chips (SoCs) require low-voltage core transistors with excellent digital, analog and RF properties, thick oxide transistors for I/O buffers, and high voltage devices for effective power management. In this talk, we will present a complete DC to high frequency characterization, compact modeling strategy, and model parameter extraction of commercially fabricated low and high-voltage FinFETs. The industry-standard BSIM-CMG compact model is modified to capture both low and high frequency characteristics accurately. Furthermore, we thoroughly compare the DC, analog, and RF performance of low-voltage, I/O, and LDMOS transistors from different CMOS technologies.
Biography:
Yogesh Singh Chauhan is a Chair professor at Indian Institute of Technology Kanpur (IITK), India. He was with ST Microelectronics during 2003-2004; IBM Bangalore during 2007 – 2010; Tokyo Institute of Technology in 2010; University of California Berkeley during 2010-2012. He is the developer of several industry standard models viz. BSIM-BULK (formerly BSIM6), BSIM-CMG, BSIM-IMG and ASM-HEMT etc. His group is involved in developing compact SPICE models for GaN HEMT, FinFET, Nanosheet/Gate-All-Around FET, FDSOI transistor, Negative Capacitance FET and 2D FET.
He is the Fellow of IEEE, Editor of IEEE Transactions on Electron Devices and Distinguished Lecturer of the IEEE Electron Devices Society. He is the chair of IEEE-EDS Compact Modeling Committee. He is the founding chairperson of IEEE Electron Devices Society U.P. chapter and chairperson of IEEE U.P. section. He has published more than 300 papers in international journals and conferences.