From Algorithms to Silicon: Foundation of Future Technology
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From Algorithms to Silicon: Foundation of Future Technology
Fri, 28/02/2025 - 14:00 to 14:30
Location:
Speaker:
Dr Tasleem Khan
Affiliation:
HWU
Synopsis:
The talk explores the evolution of next-generation algorithms and their transformation into practical, silicon-based technologies. It highlights the critical process of moving from theoretical concepts to real-world hardware implementations, emphasizing the importance of optimizing algorithms for speed, stability, and efficiency. The discussion touches on how advanced algorithms, like those used in adaptive signal processing and machine learning, are being refined to meet the demands of modern applications, such as communication systems and real-time data processing. Key considerations, such as parameter selection and implementation challenges, are also addressed. This is a forward-looking session for anyone interested in the intersection of algorithms pertaining to machine learning, signal processing and communication systems with semiconductor design. The talk encourages collaboration among researchers to push the boundaries of algorithm design and hardware integration, paving the way for future innovations in technology.
Biography:
Dr. Mohd. Tasleem Khan is an Assistant Professor at the Institute of Sensors, Signals, and Systems (ISSS) within the School of Engineering and Physical Sciences (EPS) at Heriot-Watt University, Edinburgh, UK. He earned his B.Tech in Electronics from AMU, India (2013), and his Ph.D. in VLSI for Signal Processing and Communication Systems from IIT Guwahati, India (2019). Following his Ph.D., Dr. Khan worked as a Principal Engineer at TSMC, Taiwan (2019), and later as an Assistant Professor at IIT Dhanbad, India (2020–2021). During this time, he also served as a Research Consultant on Machine Learning Algorithms and Architectures for KAUST, Saudi Arabia. Before joining Heriot-Watt, he was a Postdoctoral Research Associate at Linköping University, Sweden (2021–2024), focusing on 6G algorithms and architectures. Dr. Khan’s research and teaching interests include VLSI algorithms and architectures for machine learning, AI, signal processing, and communication systems. His work is widely published in top IEEE transactions/journals. He is an Associate Editor for IEEE Transactions on Neural Networks and Learning Systems (TNNLS) and IEEE Transactions on Automation Science and Engineering (TASE) and serves on the Editorial Board of IEEE Embedded Systems Letters. He is a TPC member for IEEE ICDCS’25, IEEE ISVLSI’25, and IEEE SaTC’25, and area chair for IEEE ICJNN’25.