Hardware implementation of CMAC and B-spline neural networks for embedded applications

The cerebellar model articulation controller (CMAC) is particularly well suited to real-time embedded applications on account of its fast learning, local generalisation, and ease of either software or hardware implementation. Among its drawbacks are a relatively large memory requirement and the inability to model function derivatives. These drawbacks are addressed by the B-spline neural network (BSNN) at the cost of greater computational complexity. This presentation describes a simple modification to the CMAC network that yields characteristics equivalent to a second order BSNN, including function derivative modelling, for the same computational complexity as CMAC and that is suitable for high speed hardware implementation in embedded applications. The use of CMAC to reduce torque ripple in a switched reluctance motor is presented as an example of an application benefitting from a high speed, yet inexpensive, neural network implementation.